US Data Center News & Briefings
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Data center news, project activity, and monthly briefings for TSMC.

Recent news

  • Buckeye Mega Site Hits Market with $1B Economic Promise

    JLL’s Phoenix office announced it will market Grand View Arizona, a fully entitled, infrastructure-rich, 2,500-acre mega site in Buckeye, Arizona projected to generate over $1 billion in economic impact.

    • Main announcement: JLL Phoenix will market Grand View Arizona, a 2,500-acre, fully entitled mega site in Buckeye with 2.75 miles of Union Pacific rail frontage, highest availability of power, water and telecommunications, immediate access to Interstate 10 and the future Loop 303/State Route 30 interchange, and is projected to generate over $1 billion in economic impact. Marketing agents named include Marc Hertzberg, Anthony Lydon, Greg Matter, John Lydon and Nicole Marshall.
    • Background and project details: The site is located minutes from Phoenix-Goodyear Airport (≈11 miles) and Phoenix Sky Harbor Airport (≈30 miles), is adjacent to the Verrado and Teravalis master-planned communities, and is proximate to Verrado Marketplace (a $275 million development by Vestar); the announcement frames the site as suitable for large-scale manufacturing, logistics, data centers and advanced manufacturing.
  • Arm shifts course, moves into silicon business

    Arm has announced it will expand into production silicon and launched the Arm AGI CPU with Meta as lead partner and first customer.

    • Main announcement: Arm is entering production silicon with the new Arm AGI CPU, positioned as a CPU purpose-built for agentic AI data centers, co-developed with Meta; the chip is designed by Ampere and will be manufactured by TSMC on a 3-nanometer process node. Key product specs announced include up to 136 Arm Neoverse V3 cores per CPU, 6GB/s memory bandwidth per core at sub-100ns latency, 300W TDP, claims of >2x performance per rack versus x86, support for 1U air-cooled deployments up to 8,160 cores per rack and liquid-cooled systems delivering 45,000+ cores per rack. Early systems are available now, with broader availability expected in the second half of the year.
    • Background and partners: The chip was designed and manufactured by Ampere (acquired by SoftBank for $6.5 billion last year). Arm confirmed additional commercial momentum with partners/customers including Cerebras, Cloudflare, F5, OpenAI, Positron, Rebellions, SAP, and SK Telecom, and is working with OEM/ODM partners ASRock Rack, Lenovo, Quanta Computer, and Supermicro for system deliveries. Independent analyst commentary (Jim McGregor, Tirias Research) raised questions about benchmark comparators and emphasized the AGI CPU is targeted at AI/accelerator orchestration rather than general-purpose enterprise CPU use.
  • Transcelestial ranks among Fast Company's top innovators

    Transcelestial has been named among the top four companies on Fast Company’s Asia-Pacific Most Innovative Companies list for 2026.

    • Main announcement: Transcelestial (a Singapore- and US-based telecoms infrastructure company) was named in Fast Company’s Asia-Pacific top four for 2026 and is also included on Fast Company’s World’s Most Innovative Companies list; it was the only communications business in the regional ranking.
    • Details & background: The company describes its technology as a “planet-to-space internet” using laser communications; it says it has deployed more than 250km of production infrastructure, handles more than 2Tbps of capacity each day, and serves more than 12 telecom companies, several dozen ISPs and defence agencies across United States, Singapore, Japan, the Philippines, Taiwan, India and Indonesia. Fast Company’s editors assessed thousands of submissions for the annual ranking.
  • Nvidia overhauls the data center for OpenClaw era

    Nvidia announced a new integrated AI-native data-center architecture and full product stack at GTC, featuring GPU “Rubin”, CPU “Vera”, the Groq LPU inference chip, the Vera Rubin NVL72 server, NVLink at 260 terabytes/sec, BlueField-4 STX, Spectrum-X switch with co-packaged optics, and Dynamo orchestration software.

    • Main announcement: Nvidia unveiled a five-layer AI data-center blueprint (physical infrastructure, silicon, software/systems, AI models, applications) and specific products to implement it, including the Rubin GPU, Vera CPU, Groq LPU (inference-focused, high memory bandwidth), the Vera Rubin NVL72 server (combines Rubin and Groq LPU), NVLink doubled to 260 TB/s, and BlueField-4 STX to extend GPU memory; the architecture emphasizes reducing the cost of generating tokens and supporting KV Cache for contextual memory.
    • Background and details: The announcement was made at GTC (product and architecture reveal rather than a financial deal); Nvidia stated Spectrum-X with co-packaged optics is in production and credited TSMC for process technology; industry voices quoted include Jack Gold (J. Gold Associates) and Sandip Gupta (NTT Data) endorsing the value of an integrated stack and the operational simplicity it offers.
  • Tariffs Add Cost, but Component Shortages Dictate Data Center Timelines

    The article reports on fluctuating US tariffs and persistent component shortages affecting data center construction.

    • Key developments on tariffs (main announcement): The US Supreme Court in February 2026 invalidated portions of certain tariff measures, prompting the Trump administration to issue revised tariff measures while legal challenges continue; affected companies are suing to recover duties paid and litigation remains ongoing, creating uncertainty over import costs and duty recoveries.
    • Supply-chain and project-level details:DRAM and HBM are reported sold out through 2028, SSD and HDD availability is constrained (Western Digital capacity tight into 2027), and Micron has announced a planned $100 billion fabrication plant in New York; hyperscalers are absorbing most available accelerators and memory, and owners are shifting procurement (increase in OFCI — owner-furnished, contractor-installed) to manage extreme lead times.
  • Jensen Huang After the Keynote: Inside Nvidia’s GTC 2026 Press Briefing

    Nvidia (Jensen Huang) framed the company as building “AI factories,” emphasizing inference, token economics, and ecosystem orchestration.

    • Main announcement: Jensen Huang presented Nvidia’s strategic shift to an inference- and token-centric model, arguing data centers must become “token manufacturing systems”, and confirming Nvidia is helping finance customer data center buildouts with partners including CoreWeave, Nscale, and Nebius. He cited a “trillion-dollar visibility” figure for Blackwell and Vera Rubin through 2027 (figure described as “trillion-dollar visibility” in the briefing).
    • Background and other details: Huang detailed Nvidia’s broader infrastructure role: co-inventing co-packaged optics with TSMC (~100 patents filed across the supply chain), production ramping for co-packaged optics, resumed manufacturing and license activity for H200 systems in China, and noted the complexity of relocating 40% of Taiwan chip capacity to the United States as a longer-term goal.
  • Jensen Huang Maps the AI Factory Era at NVIDIA GTC 2026

    Nvidia CEO Jensen Huang announced that AI is entering an infrastructure phase and unveiled hardware, software, and reference architectures to build gigawatt-scale “AI factories” for continuous inference.

    • Main announcement: Nvidia unveiled new infrastructure components including Grace Blackwell NVLink72, Vera Rubin (rack-scale systems with ~3.6 exaflops per rack and 45°C hot-water liquid cooling), the Vera Rubin DSX AI Factory reference architecture and Omniverse DSX digital-twin blueprint, and software layers OpenClaw / Nemo / Nemotron to orchestrate and secure agentic AI systems; Nvidia estimated a $1 trillion AI infrastructure market and cited an industry shift to continuous inference.
    • Details & partners: Nvidia described hybrid architectures integrating Groq accelerators (disaggregated inference via Dynamo orchestration), a production co-packaged optical switch built with TSMC, DSX integrations with partners (Cadence, Dassault Systèmes, Schneider Electric, Siemens, Vertiv, Trane Technologies, Switch) and energy partners (GE Vernova, Siemens Energy, Hitachi Energy, Emerald AI); the keynote also referenced venture funding > $150 billion for AI startups and examples like Nestlé reducing compute costs by 83% on a GPU-accelerated workload.
  • System-level ‘coopetition’: Why Nvidia’s DGX Rubin NVL8 runs on Intel Xeon 6

    Nvidia has announced that its DGX Rubin NVL8 systems will use Intel Xeon 6 (Xeon 6776P) processors as host CPUs.

    • Main announcement: Nvidia’s DGX Rubin NVL8 will be powered by Intel Xeon 6776P (Xeon 6) host CPUs, pairing eight Rubin GPUs with high-bandwidth memory and NVLink to support high-throughput, large-scale AI inference; the configuration and Intel tie-in were presented during GTC 2026.
    • Background and details:Nvidia purchased $5 billion of Intel shares in December 2025; Nvidia continues internal CPU development (Grace, Vera) while Intel advances GPUs and accelerators (Xe-based GPUs, Gaudi), and the Intel CPU choice is framed as preserving x86 compatibility, supply-chain optionality, and enterprise deployment readiness.
  • Eridu exits stealth with $200M to rebuild AI networking

    Eridu has launched out of stealth with more than $200 million in Series A funding to build custom silicon and a clean-sheet network switch for AI data center networking.

    • Main announcement: Eridu announced a Series A of more than $200 million (listed as $200 million in company summary) led by Socratic Partners with participation from John Doerr, Hudson River Trading, Capricorn Investment Group, and Matter Venture Partners; the company is headquartered in Saratoga, California, was founded in 2023, and plans to release more technical details and partnership announcements later in 2026.
    • Background and details: Eridu is founded by Drew Perkins (previously co-founded Lightera and Infinera) and has a partnership with TSMC for process technology and advanced system integration; the company has not disclosed product specifications or a GA date and is positioning its offering against incumbents Broadcom, Cisco, and Nvidia.
  • Broadcom CEO’s $100B AI Chip Bet Highlights Push for Silicon Diversity

    Broadcom CEO Hock Tan said Broadcom has a clear path to supply $100 billion worth of AI chips by 2027.

    • Main announcement: Broadcom claims a clear path to supply $100 billion in AI chips by 2027, backed by Q1 results showing AI revenue of $8.4 billion (AI revenue more than doubled year-over-year) and total sales of $19.3 billion; the company forecasts $10.2 billion in AI chip revenue for the current quarter.
    • Details and background: Tan attributed the target to accelerating hyperscaler demand and cited capacity/commitments including Google 3 GW, Anthropic 3 GW, Meta ≥2 GW, OpenAI 1 GW; Broadcom is positioning to supply custom silicon (with TSMC manufacturing) alongside networking, Ethernet, storage, and connectivity chips.
  • Microsoft unveils Maia 200 AI chip to power inference

    Microsoft has introduced Maia 200, a custom AI accelerator for inference workloads and has begun deploying it in its cloud data centres.

    • Main announcement: Microsoft introduced the Maia 200 accelerator built on a 3-nanometre process from TSMC with more than 140 billion transistors, 216 GB HBM3e (≈7 TB/s throughput), 272 MB on-chip SRAM, a 750-watt TDP, and performance claims of >10 petaFLOPS FP4 and >5 petaFLOPS FP8; Microsoft says it is already operational in U.S. Central (near Des Moines, Iowa) with rollouts planned to U.S. West 3 (Phoenix) and is deployed to accelerate services including Microsoft Foundry, Microsoft 365 Copilot, and OpenAI’s GPT-5.2.
    • Background and details: Microsoft pairs Maia 200 with a two-tier scale-up Ethernet network supporting clusters of up to 6,144 accelerators with ~2.8 TB/s bidirectional bandwidth per unit for scale-up communication; the company is releasing an SDK preview with PyTorch integration, Triton support, optimized kernels, and a low-level programming language, and claims ~30% better performance per dollar for inference vs the latest fleet hardware while positioning FP4/FP8 performance relative to Amazon Trainium v3 and Google TPU v7.
  • Microsoft launches its second generation AI inference chip, Maia 200

    Microsoft has announced Maia 200, a first-party AI inference accelerator optimized for large reasoning and multimodal models and deployed initially in Microsoft data centers.

    • Main announcement: Microsoft unveiled Maia 200 as a breakthrough inference accelerator claiming 10,145 FP4 teraflops peak and 5,072 FP8 teraflops peak, 216GB HBM, 7 terabits/s HBM bandwidth, produced on a 3nm node, and delivering 30% better performance per dollar versus the company’s latest generation hardware.
    • Context and implementation details: Maia 200 is positioned for heterogeneous, multimodal inference, integrates with Azure, Microsoft Foundry, and Microsoft 365 Copilot, supports OpenAI’s GPT-5.2 family, has a preview SDK (PyTorch integration, Triton compiler, optimized kernel library), and is deployed in US Central (Des Moines) with next rollout to US West 3 (Phoenix); timing for additional regions not disclosed.
  • Microsoft Unveils Maia 200 In-House Inference Chip

    Microsoft has announced the Maia 200, a new in-house inference accelerator designed for large-scale AI workloads.

    • Main announcement: Microsoft introduced the Maia 200 inference accelerator built on TSMC’s 3nm process, tuned for FP4 and FP8 inference, featuring 217 GB of HBM3e at 7 TB/s, 272 MB on-chip SRAM, native FP8/FP4 tensor cores, and ~140 billion transistors; Microsoft claims >10 PFLOPS FP4, >5 PFLOPS FP8, and ~30% better performance per dollar vs the prior generation. Maia 200 is deployed in Microsoft’s US central data center near Des Moines, Iowa, with US West 3 near Phoenix to follow, integrates with Azure, and includes a preview of Maia’s SDK.
    • Background and details: Microsoft positions Maia for enterprise inference rather than training; the company compared Maia 200 to hyperscaler rivals (claimed 3x FP4 vs Amazon Trainium3 and FP8 performance above Google’s 7th-gen TPU). The article cites an SNS Insider projection of an AI inference market of $349.5 billion by 2032 and includes analyst commentary from Matthew Kimball (Moor Insights & Strategy).
  • Microsoft unveils Maia 200 AI chip to cut token costs

    Microsoft has launched Maia 200, an in-house AI inference accelerator, and announced initial deployment in its US Central datacentre with US West 3 to follow.

    • Maia 200 launch and deployment: Microsoft announced Maia 200 built on TSMC’s 3nm process with >140 billion transistors, a 750W TDP, 216GB HBM3e (7TB/s) memory and 272MB on-chip SRAM, delivering >10 petaFLOPS (4-bit) and >5 petaFLOPS (8-bit). Microsoft says Maia 200 is deployed in US Central (near Des Moines, Iowa) and US West 3 (near Phoenix, Arizona) is the next region; the accelerators run Microsoft Superintelligence models and will support GPT-5.2 models from OpenAI, Microsoft Foundry projects and Microsoft 365 Copilot.
    • System, networking and software details: Microsoft described a two-tier, Ethernet-based scale-up network with a custom transport and integrated NIC, 2.8TB/s bidirectional dedicated scale-up bandwidth per accelerator, collective operations across up to 6,144 accelerators, and trays that connect four accelerators via direct links. Microsoft is previewing the Maia SDK (PyTorch integration, Triton compiler, optimized kernel library) and validated designs in a pre-silicon environment and datacentre integration including a second-generation closed-loop liquid cooling Heat Exchanger Unit. Microsoft claims 30% better performance per dollar versus the current fleet and compares Maia 200 performance to Amazon Trainium and Google’s TPU.

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